Unified Modeling, Automated Configuration and Simulation

for Embedded Networks and Real-Time Software in a Single Platform

Trusted for over 15 years to design and verify mission-critical electronic architectures in automotive, aerospace, and industrial sectors.

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From Simulation to Safe Deployment —One Tool for Network Design Teams

RTaW-Pegase® (pronounced “pay-gahz”) supports the design of safe and optimized networks including automotive, aerospace, industrial Ethernet and TSN networks, CAN (FD,XL), LIN, Arinc and wireless networks.

Pegase speeds-up the design exploration, optimization and validation of next-generation Software-Defined Systems deployed on multi-core platforms.

In addition to timing-accurate simulation, Pegase enables precise computation of upper bounds on buffer usage, messages and task latencies. It also offers advanced automated configuration algorithms to ensure system correctness and an optimized use of hardware and software components.

Over

30 times Faster TSN Network Design*

*compared to manual configuration

thanks to our proprietary ZeroConfig-TSN® (ZCT) generative design algorithm

Why Design Teams Choose RTaW-Pegase®

  • Evidence-Based Design— RTaW-Pegase provides detailed performance metrics, including network loads, response times, jitters, and buffer usage, allowing you to predict system performance across various scenarios. The tool also offers features to compare different design and configuration options, supporting you throughout the entire development cycle.

  • Reduce Time-to-Market — Our proprietary ZeroConfig-TSN® (ZCT) generative design algorithm accelerates TSN network design by up to 30 times or more. Want to see ZCT in action? Contact the product manager for a demo.

  • Future-Proof Design — Our Topology Stress Test® (TST) function predicts how much traffic your network can handle, helping you design for future scalability. Interested in discovering how TST can assist in creating a future-proof network? Contact the product manager for a demo or download this study.

  • Work Hand-in-Hand with Upstream Architecture Modeling Tools — Pegase seamlessly complements architecture modeling tools such as PREEvision®, smoothly integrating into your existing workflows to enhance them with automatic configuration of scheduling and QoS parameters, validation of timing and reliability constraints, and optimizing overall system performance.

  • Next-generation Tool for Automated Engineering — Pegase not only addresses the use-cases covered by traditional model-based analysis tools such as SymTA/S® but also augment engineers through advanced automation and synthesis capabilities that streamline workflow, enhance productivity, and optimize system design proactively.

  • Cost Optimization — RTaW-Pegase enables you to avoid over-provisioning of resources (processors, link speeds, memory in switches, unneeded technologies, etc). In addition, RTaW-Pegase includes design space exploration algorithms to optimize network topologies (e.g., number and location of switches), data streams routing and allocation of the software functions on the stations. Cost-performance trade-offs can be compared using built-in cost models – refer to this study for an example.

  • Results You Can Trust — RTaW-Pegase uses Network Calculus for timing verification, a method accepted in aeronautics certification. The core algorithms are detailed in peer-reviewed scientific publications — explore publications co-authored with our partners and research papers by our team members.

  • Proven Track Record — Since 2007, leading companies in automotive, aerospace and defense, and industrial sectors have trusted RTaW-Pegase – see the companies that rely on us for their critical network design needs.

Features

  • Comprehensive Ethernet Support: Supports automotive, aerospace, and industrial Ethernet, including 802.1Q TSN, 802.1Qav/AVB Credit-Based Shaper, 802.1Qbv Time-Aware Shaper, 802.1Qcr Asynchronous Traffic Shaper, 802.1Qbu frame preemption, 802.1CB frame replication, 802.1Qci filtering, 802.1AS-2020 clock synchronization, 10BASE-T1S, SOME/TP (TP), DDS, DoIP, and AVTP. Also supports Time-Triggered Ethernet (SAE AS6802) and AFDX (ARINC664) for arbitrary speeds and topologies.
  • Service-Oriented Communications with SOME/IP, DDS and MQTT, combined with dedicated TSN configuration algorithms, ensures reliable and timely delivery of services.
  • Support for Diverse Traffic Patterns: Handles periodic and sporadic message transmission patterns, UDP and TCP transmissions, segmented messages (e.g., video streams and FTP traffic), and complex transmission patterns (e.g., DoIp protocol, patterns defined via Java plugin).

  • Comprehensive Support for Timing and Reliability QoS: Supports FIFO, priority, AVB credit-based shaper, TSN time-aware shaper, frame preemption, Asynchronous Traffic Shapers, traffic policing (PSFP, IEEE802.1Qci), frame replication (FRER, IEEE802.11CB), TTEthernet (SAE AS6802) and round-robin frame schedulers.

  • Optimized Scheduling for TSN: Generates optimized transmission schedules for TSN Time-Aware Shaper (IEEE 802.11Qbv): bus mode, exclusive gating and bandwidth sharing.
  • ZeroConfig-TSN (ZCT)Ⓒ: a “push-button” approach to automate the selection and configuration of TSN networks.
  • Optimized Configuration Algorithms: Includes optimized priority allocation and routing algorithms, configuration algorithms for AVB credit-based shaper, TSN time-aware shaper and the asynchronous traffic shaper.

  • Trace Analysis (TraceInspector module): Supports PCAP(-NG) format for Ethernet, T1S and ASC format for CAN and FlexRay, detects non-conformance to specifications (such as packet size, transmission period, and unknown packets), validates modeling assumptions for event-triggered frames, estimates switching delays and successive frame inter-arrival times, and offers GANTT chart representations of the trace.

  • System-Level Modeling: The Software-Defined Vehicles (SDV) module enables modeling, simulation, and worst-case schedulability analysis of software components on multi-core processors. System-level timing chains can be visualized via Gantt charts.
  • Task Scheduling Analysis: Supports the configuration and analysis of task scheduling, including Event-Triggered and Time-Triggered scheduling, independent tasks, task graphs, and runnables. Verifies system-wide timing chains across tasks, networks, and CPUs.
  • Customizable System Modeling: Enables the modelling of high-level communication layers, run-time environments, and applications using user-written Java plug-ins, allowing the simulation of complete embedded systems.

  • Performance Evaluation of Heterogenous Architectures: worst-case analysis and timing-accurate simulation of communication architectures composed of CAN (2.0A, 2.0B, CAN FD, CAN XL, and ARINC825), switched Ethernet, AFDX, TTE, FlexRay, LIN, PON (ETA 2024/10), ARINC429 and wireless networks such as 802.11p, interconnected through gateways.
  • Comprehensive Performance Prediction: Offers both worst-case analysis and timing-accurate simulations, with a parallelized engine to predict worst-case and typical performance scenarios.
  • Accurate Latency Computations: Maximum pessimism of computed communication latencies to typically less than 15% compared to true worst-case latencies.
  • Fast and Efficient: Analyzes and simulates large networks in seconds, providing quick insights even for complex systems.
  • State-of-the-Art Network Calculus: Uses advanced Network Calculus techniques to compute upper bounds on communication latencies, frame jitters, and buffer utilization (see our research works on Network Calculus here).

  • Modeling workbench featuring a robust graphical editing and visualization environment, a communication architecture editor, Gantt charts for communication traces, and tools for visually comparing design options.
  • Design-Space Exploration: Topology Stress Test (TST)Ⓒ facilitates early-stage design decisions without full knowledge of communication requirements, allowing for exploration of topological and technological choices.
  • Benchmark Generation: Includes a benchmark generator to create random yet realistic Ethernet configurations. Useful for early-stage evaluation or studying network scalability.

 

  • Seamless Data Exchange: Easily import/export configurations and simulation results through copy-paste, CSV, XLS, XML, YANG (as defined in the IETF/IEEE standards), Java plug-ins and industry-standard formats such as .dbc and .arxml.
  • Import your existing E/E architectures from PREEvision or .arxml models into Pegase to define scheduling and QoS parameters, validate timing and reliability constraints, and optimize system performance.

  • Cross-Platform Compatibility: Runs on any platform supporting Java, with various licensing options including perpetual, time-limited, floating, or node-locked models.
  • Professional support and development of custom extensions.
  • API availability: RTaW-Pegase functionalities are also available through the Pegase Java library for integration into your own programs.
  • Headless version: Designed for effortless CI/CD automation.
Highlights

Modelling, Configuration, Visualisation, Design-Space Exploration

Discover use-cases

Built-in support for variant management and comparison of design alternatives based on performance and cost

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The results panel displays the calculated maximum communication latencies, with red indicating a timing constraint violation for a specific data flow. Zero-Config TSN® offers solutions to resolve these issues.

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RTaW-Pegase automatically detects critical scenarios that cause maximum communication delays or excessive memory utilization in switches. By visualizing these scenarios in a Gantt diagram, you can easily identify network bottlenecks.

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Modular by Design

RTaW-Pegase is modular, allowing you to choose technology-specific modules that tailor the software to your project needs.

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News & events

  • 2025/10: A joint work with Renault Group entitled ‘Overcoming QoS Challenges in a Full Automotive Ethernet Architecture’ was presented at the IEEE SA Ethernet & IP @ Automotive Technology Day held in Toulouse on October 15-16, 2025. This study explores the use of 10Base-T1S with optimized PLCA configuration in a zonal-oriented architecture to meet strong real-time requirements in a next-generation, fully Ethernet-based E/E architecture. Download presentation slides.

  • 2024/10: A joint work with BMW entitled ‘Automotive System Requirements on Traffic Shaping’ was presented at the TSN/A Conference in Stuttgart on October 1-2, 2024. This study compares CBS and ATS traffic shapers, focusing on latency and memory utilization in a BMW pre-series vehicle. Download presentation slides.

  • 2024/03: At the Automotive Ethernet Congress in Munich (March 5-7, 2024), we presented ‘How DDS and TSN Can Help Manage a Flexible In-Vehicle Network Architecture: Paving the Way to Software-Defined Networking.’ This presentation was part of a collaborative effort with our technology partner, Real-Time Innovations. Download presentation slides. Watch recorded webinar with RTI.

  • 2023/09: The presentation ‘What are the Key Differences Between Asynchronous (ATS) and Credit-Based (CBS) Shapers?’ was delivered at the TSN/A Conference on September 27-28 in Ludwigsburg, Germany, in collaboration with Ethernovia. Download presentation slides.

  • 2023/06: RTaW-Pegase V4.5 now supports the Data Distribution Service (DDS) middleware, automating the mapping of DDS-defined QoS to TSN mechanisms.. Interested? Contact us for a demo. RTaW and RTI have partnered to provide DDS & TSN solutions for mission-critical systems.

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TSN Training

Learn about the TSN standards and how to design efficient TSN networks.

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System-Level Verification

Unified Modeling and Simulation for Networks and Real-Time Software in a Single Platform.

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